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  ġ : HOME > Digilent > FPGA & Programmable Logic 

NETFPGA-SUME
Virtex-7 FPGA Development Board
        [ΰ]
(̴ ǸŰ Ե ݾԴϴ.)
  ǰ : IPG000616860
       : Digilent
 IP :
 ó :
  :
  
  
NetFPGA-1G-CML
1,860,000
NETFPGA
1,650,000

The NetFPGA-SUME board is the ideal platform for high-performance and high-density networking design. A collaborative effort between Digilent, the University of Cambridge, and Stanford University, the NetFPGA-SUME has everything you need to conduct cutting edge research and development of state-of-the-art networking systems.

The NetFPGA-SUME is an amazingly advanced board that features one of the largest and most complex FPGAs ever produced, a Xilinx Virtex-7 690T supporting thirty 13.1 GHz GTH transceivers. Four SFP+ 10Gb/s ports, five independent high-speed memory banks built from both 500MHzQDRII+ & 1866MT/s DDR3 SoDIMM devices, and an eight-lane third generation PCIe offer incredible throughput and can sustain a large number of high-speed data streams to the FPGA fabric and memory devices. Other features include the presentation of twenty transceivers in total on FMC and QTH expansion connectors, and SATA ports. The NetFPGA-SUME's main mission is to give students, researchers, and developers a state-of-the-art platform for networking, whether it's learning the fundamentals or creating new hardware and software applications. This board easily supports simultaneous wire-speed processing on the four 10Gb/s Ethernet ports, and it can manipulate and process data on-board, or stream it over the 8x Gen.3 PCIe interface and the expansion interfaces.

This board is supported by a large collection of free IP blocks available at www.netfpga.org.

Support Materials

Datasheet (PDF) Schematics (PDF)

For all other material:

Resource Center

Features:

  • Xilinx Virtex-7 XC7V690T FFG1761-3
  • Xilinx CPLD XC2C512 for FPGA configuration
  • PCIe Gen3 x8 (8Gbps/lane)
  • Two 512Mbits Micron StrataFlash (PC28F512G18A)
  • Programming: Xilinx Vivado Design Suite
  • Three x36 72Mbits QDR II SRAM (CY7C25652KV18-500BZC)
  • Two 4GB DDR3 SODIMM (MT8KTF51264Hz-1G9E1)
  • Micro USB Connector for JTAG programming and debugging (shared with UART interface)
  • One Micro USB cable for programming/UART
  • QTH Connector (8 RocketIO GTH transceivers)
  • Four SFP+ interface (4 RocketIO GTH transceivers) supporting 10Gbps
  • Two SATA-III ports
  • User LEDs and Push Buttons
  • One HPC FMC Connector (10 RocketIO GTH transceivers)
  • One Pmod connector

What's
Included:

  • NetFPGA-SUME
  • Custom Digilent cardboard box with protective foam
  • 1.2 meter shielded high-speed USB 2.0 micro USB cable


Welcome to the resource center for the NetFPGA-SUME!

Here you will find all the reference materials that Digilent has created for this board, as well as links to any external content we have tracked down. If you are interested in purchasing the NetFPGA-SUME, visit the product page on our main website: NetFPGA-SUME

Documentation

  • SchematicPDF
    • PDF Schematic of the PCB generated by Altium
  • Reference ManualWiki PDF
    • Technical description of the NetFPGA SUME and all of its features. The Wiki page may contain more up-to-date information and than the PDF.
  • Getting Started GuideWiki
    • Great starting point for new NetFPGA SUME owners. This guide is hosted on the NetFPGA Wiki.
  • Sell SheetPDF

Design Resources

  • Master XDCZIP
    • This package contains the master XDC that defines the pin constraints for every device on the NetFPGA SUME except the QDRII+ and DDR3.

Reference Projects

The NetFPGA SUME reference projects are developed and maintained by the NetFPGA Organization and hosted on the NetFPGA SUME Github Wiki.






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